Rule Review

Patent applicants are entitled to fair treatment by the U.S. Patent and Trademark Office (USPTO) under the Administrative Procedure Act (APA), a federal law that governs how administrative agencies are permitted to take certain actions. 5 U.S.C. § 500 et seq. When deciding a contested matter, such as the patentability of an applicant's patent claims, the APA requires that an applicant be provided with an opportunity to respond to a ground of rejection. In other words, if the Patent Trial and Appeal Board (PTAB or the Board) relies on a new ground of rejection denying patentability of an applicant's claims, that applicant has a right to argue against those new grounds.

Since the Supreme Court's decision in KSR International Co. v. Teleflex Inc., 550 U.S. 398 (2007), patent applicants have been faced with steepening challenges arguing patentability. The KSR decision permitted the USPTO to rely on "common sense" in formulating obviousness rejections, which can sometimes be vexing and difficult to overcome. See id. However, the PTAB may not overstep the requirement to treat applicants fairly by taking procedural shortcuts that deprive an applicant the right to respond fully to a rejection, on the record.

Two recent decisions of the United States Court of Appeals for the Federal Circuit define when a ground of rejection by the PTAB is new. It has long been the case that the Board can supplement the findings of a patent examiner. The central question is whether the Board and the examiner properly relied on the same factual underpinnings and articulated reasoning in rejecting an applicant's claims or whether the Board made new findings and adopted different reasons to create a new ground of rejection under 37 C.F.R. § 41.77, thereby depriving the applicant of an opportunity to respond.

In Rambus v. Rea, 731 F.3d 1248 (Fed. Cir. 2013), the court considered a case where claims filed by Rambus directed to certain dynamic RAM memory operations were determined to be invalid on grounds of obviousness during reexamination. The technology in question allowed memory write operations to take place during an entire microprocessor clock cycle, whereas in the prior art only half of the cycle was commonly used for writing to memory. The examiner rejected the claims based on a certain combination of two references. The examiner's rejection, however, was factually flawed, and all parties to the reexamination and appeal conceded that the rejection was in error...